I am trying to write a PIC18 port using the CCS C compiler.
Could someone explain me how the functions prvLowInterrupt and prvTickISR in port.c work?

If I can understand how those two functions switch the context and start executing a specific task, I may be able to write a CCS version . Implementing interrups with CCS is totally different that C18 compiler.
I read the page on the Implementation of FreeRTOS, it helps, but not enough.

A lot of people out there would like a CCS version of FreeRTOS, since CCS is a lot less xpensive than C18.

Please, help me with this port.
Thanks in advance.

Hi,

Ugliest of all the ports – primarily because the compiler is not re-enterant so a whole chunk of global memory has to be saved as part of the context switch.

prvLowInterrupt() is ‘the’ interrupt service routine. The compatibility mode is used meaning that only one interrupt priority exists. prvLowInterrupt() simple polls all the peripherals that could have caused the interrupt and call the appropriate ISR routine. It first checks to see if the interrupt was caused by the timer – and if so calls the Tick ISR, it then checks to see if it was caused by a character Rx and if so calls the serial port Rx interrupt … etc.

prvTickISR() is the function that implements the tick ISR (strangely), it is called by prvLowInterrupt() when the interrupt was generated by the timer.

prvTickISR() follows the same sequence as all the tick ISR’s in all the ports, namely:

-Save the current context
-Call vTaskIncrementTick() which checks to see if any tasks are woken by the tick ISR.
-If the preemptive scheduler is being used, vTaskSwitchContext() is called to switch to the highest priority task that is ready to run. If the preemptive scheduler is not called this step is skipped as a context switch can only be caused by a call to portYIELD().
-Finally restores the current context – which may be different to the context saved if vTaskSwitchContext() switched in another task. This way the ISR will return to the highest priority task.

The tricky bit is the saving and restoring of the context which is very C18 specific. The compiler uses two of the indirect memory registers as stack pointer and frame pointer. Therefore the POSTINC0 calls is effectively pushing variables onto the stack.

1) First some registers are pushed so they get stored in their original state – these get modified in the next step so this must happen first.

2) Next the interrupt status flags are stored – this is what causes the registers to get modified in step 2.

3) Next all the other necessary CPU registers are stored.

4) Followed by the global memory regions used by the compiler (.tempdata and MATH_DATA sections – yuk).

5) Next the hardware stack is saved onto the software stack.

6) The size of the hardware stack is variable, so following the hardware stack values, the number of values pushed onto the stack also gets stored.

7) Finally the new stack top is saved into the TCB.

Hopefully this will help you follow the comments in the code. As I said though this is very specific to the C18 compiler. This is also the trickiest of all the ports. It may be helpful to get the evaluation version of the C18 compiler and step through the code to help understanding.

Regards.

Thanks a lot for your help. You almost wrote a book. Your comments were a precious help. I was able to get the scheduler running on the CCS compiler. I am still working on it. The CCS malloc and free functions really suck. They work properly on certain conditions, not all the time. So I am working on how to handle memory management. Thank you again.

There are some basic memory management routines included in the download. May be good enough for what you want.

http://www.freertos.org/a00111.html

hello
Thanks for Richard - richardbarry and Nobody/Anonymous - nobody for detailed description of porting 18f452 using ccs complier.Ii am a baby to this. I like to port this to pic 16f877 Is it possible?
Pl give reply sir

Unfortunately I don’t think this is really feasible with the tiny on board memory available. Also the current port uses some instructions/modes only available on the PIC18 series.

By: Richard - richardbarry
RE: FreeRTOS PIC18 Port using CCS compiler
2004-11-22 10:29
Hi,

Ugliest of all the ports – primarily because the compiler is not re-enterant so a whole chunk of global memory has to be saved as part of the context switch.

what is re-enterant can u explain

Here is a small text:

http://en.wikipedia.org/wiki/Reentrant

It means basically that functions can be shared by different processes (inc interrupts).

If a function places all it's code on the stack then different tasks can call the same function and each will use different memory. For example:

int Calculate( int in1, int in2 )
{
int temp;

temp = in1;
temp += 2;

return temp;
}

Here temp is on the stack. Now if one task Calculate it will use a local stack copy of temp. If the task gets swapped out and another task runs, then it too calls Calculate it will have its own copy of temp also. This means that it will not corrupt the temp used by the first task. This function is reentrant.

Instead -

int Calculate( int in1, int in2 )
{
static int temp;

temp = in1;
temp += 2;

return temp;
}


Here temp is static so is not on the stack. Each task that calls Calculate will use the same temp variable. If more than one task calls temp at the same time then temp will corrupt. This function is not reentrant.