FreeRTOS Support Archive
The FreeRTOS support forum is used to obtain active support directly from Real
Time Engineers Ltd. In return for using our top quality software and services for
free, we request you play fair and do your bit to help others too! Sign up
to receive notifications of new support topics then help where you can.
This is a read only archive of threads posted to the FreeRTOS support forum.
The archive is updated every week, so will not always contain the very latest posts.
Use these archive pages to search previous posts. Use the Live FreeRTOS Forum
link to reply to a post, or start a new support thread.
[FreeRTOS Home] [Live FreeRTOS Forum] [FAQ] [Archive Top] [June 2016 Threads] how to support interrupt nested in cpu without NVICPosted by zhuchunxia on June 21, 2016 Hi:
in my port source file. my interrupt porting code like this
define portDISABLEINTERRUPTS() vPortDisableInterrupt()
define portENABLEINTERRUPTS() vPortEnableInterrupt()
define portSETINTERRUPTMASKFROMISR() GetLocalPSR()
define portCLEARINTERRUPTMASKFROMISR(x) SetLocalPSR(x)
GetLocalPSR() will return current interrupt enable flag and disable interrupt
SetLocalPSR(x) will store interrupt enable flag by x.
it seems to not support interrupt nested as portSETINTERRUPTMASKFROMISR() disable all interrupt.
should I set mask to those interrupts which is lower than current interrrupt priority to allow higher priority interrupt happen ?
vincent
how to support interrupt nested in cpu without NVICPosted by rtel on June 21, 2016 If you are implementing a full interrupt nesting scheme then both taskENTERCRITICAL() and taskENTERCRITICALFROMISR() [also called portSETINTERRUPTMASKFROMISR()] should disable interrupts up to a user defined maximum interrupt priority. The interrupts that have a priority above that maximum will never be disabled by the RTOS, but cannot use the FreeRTOS API.
If you are in a critical section then you don't want interrupts below the user defined maximum to be able to execute - this is not related to interrupt nesting as such as interrupts at or below the above mentioned user defined maximum priority can only nest when you are outside of a critical section (which is the point of entering the critical section).
how to support interrupt nested in cpu without NVICPosted by zhuchunxia on June 22, 2016 the user defined maximum interrupt priority you mentioned is configMAXSYSCALLINTERRUPT_PRIORITY ?
I know the value is used to set interrupt priority register instead of RTOS kernel .
my cpu has no interrupt priority register to rearrange all interrupt prority.
Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.
|