FreeRTOS Support Archive
The FreeRTOS support forum is used to obtain active support directly from Real
Time Engineers Ltd. In return for using our top quality software and services for
free, we request you play fair and do your bit to help others too! Sign up
to receive notifications of new support topics then help where you can.
This is a read only archive of threads posted to the FreeRTOS support forum.
The archive is updated every week, so will not always contain the very latest posts.
Use these archive pages to search previous posts. Use the Live FreeRTOS Forum
link to reply to a post, or start a new support thread.
[FreeRTOS Home] [Live FreeRTOS Forum] [FAQ] [Archive Top] [January 2014 Threads] ARM CORTEX with multiplexed external bus interface supported by
freeRTOSPosted by jorgeq on January 14, 2014 Good afternoon
So far we are using 8051MX
from Philips with a proprietary RTOS for our products.
We are considering changing to FreeRTOS + expansions(TCP-IP, USB
Connectivity) and to ARM Cortex Mx to replace our existing CPU.
However we have a major draw-back we have a lot of I/O boards using
multiplexed Intel bus.
Can you advise what MCUs that support multiplexed external bus to interface with our expansion boards that
are supported by Free RTOS.
Thanks in advance
Jorge Quintela
Product development manager
ARM CORTEX with multiplexed external bus interface supported by
freeRTOSPosted by davedoors on January 14, 2014 What do you mean by a multiplexed bus? If you mean the io and memory addresses are separate, then I dont know any modern mcus that have that.
ARM CORTEX with multiplexed external bus interface supported by
freeRTOSPosted by jdurand on January 14, 2014 The 805x series of processors uses the same pins for address and data. The address is put out while ALE (Address Latch Enable) is high, then the bus switches to data I/O when ALE falls.
I have no idea how this bothers FreeRTOS, the OS shouldn't know it's going on.
Something I had run into in the past is paged memory. THAT is a pain to implement in an OS.
ARM CORTEX with multiplexed external bus interface supported by
freeRTOSPosted by jorgeq on February 4, 2014 Thanks for your answer
In fact this should be transparent to the OS since it is solved at hardware level. I found TMPM361F10FG from Toshiba or EFM32 from Silicon LABs that support this but I could not find if these MCUs are suppported by RTOS. By support I mean kernel itself library etc. for MCU with hardware support for these peripherals.
Jorge
ARM CORTEX with multiplexed external bus interface supported by
freeRTOSPosted by davedoors on February 4, 2014 FreeRTOS runs on any Cortex M3, Cortex M4, Cortex M4F Cortex M0 and Cortex M0+ chip.
ARM CORTEX with multiplexed external bus interface supported by
freeRTOSPosted by jorgeq on February 4, 2014 Thanks for your answer
The processors uses the same pins for address and data. The address is put out while ALE (Address Latch Enable) is high, and latched esternally then the bus switches to adicional adresses and data when ALE falls.
EFM32 and some toshiba MCUs for example have hardware support for this. My question is are these types (or other with similar external bus capability) be supported by FreeRTOS.
JOrge
Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.
|