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Hi,
I am working on a LPCXpresso 1227 board, which is a M0 device.
Looking at the official demo provided with FreeRTOS for other M0 devices(LPC1114 and STM32F051) I don't see the following parameters in the "FreeRTOSConfig.h" file.
#define configKERNEL_INTERRUPT_PRIORITY
#define configMAX_SYSCALL_INTERRUPT_PRIORITY
The documentations describes a reference method for handling interrupts by using semaphores to sync a task with the ISR and use portEND_SWITCHING_ISR().
My confusion arises when i look at the LPCXpresso support site over at NXP, where they are providing demos which make use of the configKERNEL_INTERRUPT_PRIORITYand configMAX_SYSCALL_INTERRUPT_PRIORITY (at least they are defined in FreeRTOSConfig.h)
Another difference is that they dont include the following mapping...
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
Which are present in the the official M0 port.
Can someone tell me, are both of them correct?
Why does the NXP demo omit the mapping of the IRQ handlers?
Why are settings for configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY not configurable in the official FreeRTOS port?
I am facing some frequent system hangs when using the LPC1200 Series demo at NXP site, my system uses UART and GPIO interrupts. Might be my code, but I wanted to understand this topic first. Thanks to anyone who helps.
“Looking at the official demo provided with FreeRTOS for other M0 devices(LPC1114 and STM32F051) I don't see the following parameters in the "FreeRTOSConfig.h" file.
#define configKERNEL_INTERRUPT_PRIORITY
#define configMAX_SYSCALL_INTERRUPT_PRIORITY”
These are not used in M0 ports. They are in M3, M4 and M4F.
“Another difference is that they dont include the following mapping...
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
Which are present in the the official M0 port.”
They probably install the handlers directly into the vector table. See item one here http://www.freertos.org/FAQHelp.html
Regards.
Thanks for the quick reply.
I found that NXP did actually install those handlers directly in the vector table. So that part is understandable.
As for the first question, If M0 port does not require configKERNEL_INTERRUPT_PRIORITY andconfigMAX_SYSCALL_INTERRUPT_PRIORITY does it mean I can leave my peripheral interrupt priorities at their default level (which is the maximum)?
I have interrupt handlers which makes queue access. So I am using the ISR safe version of the API functions with portEND_SWITCHING_ISR() at the end of the ISR to ensure context switch.
Just want to make sure my concept of using ISR is correct for a m0 port.
Regards
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