JP24 is used to connect pin F10 to the LED
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See also the FAQ My application does not run, what could be wrong?, noting in particular the recommendation to develop with configASSERT() defined in FreeRTOSConfig.h.
The IAR Embedded Workbench for ARM worksapce for the STM32F7 demo application is called RTOSDemo.eww, and is located in the FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL directory.
The ARM Keil project for the STM32F7 demo application is called RTOSDemo.uvprojx, and is located in the FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL directory.
main_blinky() creates two tasks and one queue before starting the RTOS scheduler.
The queue send task is implemented by prvQueueSendTask() in main_blinky.c. It writes to the queue every 200 milliseconds.
The queue receive task is implemented by prvQueueReceiveTask() in main_blinky.c. It blocks on queue reads to wait for messages from the queue send task - toggling an LED each time a message is received. As the queue send task writes to the queue every 200 milliseconds the queue receive task receives a message and toggles the LED every 200 milliseconds.
A 'check' task is also created which periodically inspects the standard demo tasks to ensure they are executing as expected. The check task also toggles an LED. The LED will toggle every 3 seconds if the check task has determined the demo is executing as expected, and every 200ms if the check task has detected a potential error in any of the standard demo tasks.
This sets the frequency of the RTOS tick interrupt. The supplied value of 1000Hz is useful for testing the RTOS kernel functionality but is faster than most applications need. Lowering the frequency will improve efficiency.
See the RTOS kernel configuration documentation for full information on these configuration constants.
Whereas configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY are full eight bit un-shifted values, defined to be used as raw numbers directly in the ARM Cortex-M7 NVIC registers, configLIBRARY_LOWEST_INTERRUPT_PRIORITY and configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY are equivalents that are defined using just the 4 priority bits implemented in the STM32F7 NVIC. These values are provided because the CMSIS library function NVIC_SetPriority() requires the un-shifted 4 bit format.
Attention please!: See the page dedicated to setting interrupt priorities on ARM Cortex-M devices. Remember that ARM Cortex-M cores use numerically low priority numbers to represent HIGH priority interrupts. This can seem counter-intuitive and is easy to forget! If you wish to assign an interrupt a low priority do NOT assign it a priority of 0 (or other low numeric value) as this will result in the interrupt actually having the highest priority in the system - and therefore potentially make your system crash if this priority is above configMAX_SYSCALL_INTERRUPT_PRIORITY. Also, do not leave interrupt priorities unassigned, as by default they will have a priority of 0 and therefore the highest priority possible.
The lowest priority on a ARM Cortex-M core is in fact 255 - however different ARM Cortex-M microcontroller manufacturers implement a different number of priority bits and supply library functions that expect priorities to be specified in different ways. For example, on ST STM32F7 ARM Cortex-M7 microcontrollers, the lowest priority you can specify is in fact 15 - this is defined by the constant configLIBRARY_LOWEST_INTERRUPT_PRIORITY in FreeRTOSConfig.h. The highest priority that can be assigned is always zero.
It is also recommended to ensure that all priority bits are assigned as
being preemption priority bits, and none as sub priority bits as is done
in the demo project by the function call
HAL_NVIC_SetPriorityGrouping( NVIC_PRIORITYGROUP_4 );
Each port #defines 'BaseType_t' to equal the most efficient data type for that processor. This port defines BaseType_t to be of type long.
Note that portEND_SWITCHING_ISR() will leave interrupts enabled.
The following source code snippet is provided as an example. The interrupt uses a direct to task notification to synchronise with a task (not shown), and calls portEND_SWITCHING_ISR to ensure the interrupt returns directly to the task.
void Dummy_IRQHandler(void)
{
long lHigherPriorityTaskWoken = pdFALSE;
/* Clear the interrupt if necessary. */
Dummy_ClearITPendingBit();
/* This interrupt does nothing more than demonstrate how to synchronise a
task with an interrupt. A task notification is used for this purpose. Note
lHigherPriorityTaskWoken is initialised to zero. */
vTaskNotifyGiveFromISR()( xTaskToNotify, &lHigherPriorityTaskWoken );
/* If the task with handle xTaskToNotify was blocked waiting for the notification
then sending the notification will have removed the task from the Blocked
state. If the task left the Blocked state, and if the priority of the task
is higher than the current Running state task (the task that this interrupt
interrupted), then lHigherPriorityTaskWoken will have been set to pdTRUE
internally within vTaskNotifyGiveFromISR(). Passing pdTRUE into the
portEND_SWITCHING_ISR() macro will result in a context switch being pended to
ensure this interrupt returns directly to the unblocked, higher priority,
task. Passing pdFALSE into portEND_SWITCHING_ISR() has no effect. */
portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );
}
Only FreeRTOS API functions that end in "FromISR" can be called from an interrupt service routine - and then only if the priority of the interrupt is less than or equal to that set by the configMAX_SYSCALL_INTERRUPT_PRIORITY configuration constant (or configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY).